Cadence Design Systems, Inc. has released an update (HF049) to OrCAD Capture, PSpice Designer and PCB Designer 17.20.000-2016. This latest release reduces PCB development time by addressing the need to design reliable circuits for smaller, more compact devices.


CCRID Product ProductLevel2 Title

2002642 ADW ADWSERVER Exception in adwserver.out with LDAP enabled
2007046 ADW ADWSERVER Component Browser is not connecting to server in hotfix 048
1997678 ADW DBEDITOR Model not deleted due to missing cell model relation
1985059 ADW FLOW_MGR Flow Manager issues warning about project path that contains a period, removes from catalog file
1991515 ADW FLOW_MGR Flow Specific Tools: Launch error after upgrading to Hotfix 044 and extending code
1972762 ADW PART_BROWSER The Schematic Models icon does not match the definition in EDM Component Browser
1830062 ALLEGRO_EDITOR DATABASE Uprevving release 14.0 design with stand-alone DBDoctor in release 17.2-2016 crashes; works in release 16.6
1980161 ALLEGRO_EDITOR DATABASE NODRC_ETCH_OUTSIDE_KEEPIN assigned to text in library part is not passed to PCB Editor
2003757 ALLEGRO_EDITOR DATABASE Open circuit not detected by PCB Editor: reports unconnected pin as connected
2009748 ALLEGRO_EDITOR DFM PCB Editor crashes on Update DRC
1796895 ALLEGRO_EDITOR DRC_CONSTR Increase precision of Inter Layer Spacing check
1997487 ALLEGRO_EDITOR DRC_CONSTR Cannot add teardrops to some pins
1857024 ALLEGRO_EDITOR EDIT_ETCH PCB Editor crashes on using funckey 'y FORM mini padstack_list -+'
1979750 ALLEGRO_EDITOR INTERFACES axlStepSet not working for component definitions
1988168 ALLEGRO_EDITOR MANUFACT Graphical Compare in productivity toolbox terminates with errors
1982233 ALLEGRO_EDITOR SCHEM_FTB Netlist files cannot be imported into board as the process is not finishing
2000367 ALLEGRO_EDITOR SCHEM_FTB Cross-probing between OrCAD Capture and PCB Editor does not work in HotFix 048
2000397 ALLEGRO_EDITOR SCHEM_FTB Cross-probing not working with hotfix 048
2000552 ALLEGRO_EDITOR SCHEM_FTB Cross-probing is not working if we are importing Netlist from PCB Editor
2001165 ALLEGRO_EDITOR SCHEM_FTB Cross-probing between Capture - Allegro PCB Editor fails after hotfix 048
2002635 ALLEGRO_EDITOR SCHEM_FTB Cross-probing issue because of Unique MPS Session in HotFix 048 (QIR7)
2004252 ALLEGRO_EDITOR SCHEM_FTB Cannot do cross-probing between Capture and PCB Editor
2004305 ALLEGRO_EDITOR SCHEM_FTB Inter-tool communication is not working properly in PCB Editor release 17.2-2016, hotfix 048
1978660 ALLEGRO_EDITOR SHAPE Static shape on dynamic shape issue: thermals not removed when component is moved
1985035 ALLEGRO_EDITOR SHAPE Thermal reliefs not removed on moving parts
1960966 ALLEGRO_EDITOR SKILL Stackup import is not working in release 17.2-2016 via automation
2003651 ALLEGRO_EDITOR UI_FORMS Error on starting and loading footprints in hotfix 048: message about customExtended and customState
2003810 ALLEGRO_EDITOR UI_FORMS OrCAD layout editor font size is too small for almost all UI
2003832 ALLEGRO_EDITOR UI_FORMS Error on loading footprint in hotfix 048: custom toolbar cannot be loaded due to registry problem
2004769 ALLEGRO_EDITOR UI_FORMS Custom toolbars cannot be loaded as the size of customState and customExtended differs in registry
2007669 ALLEGRO_EDITOR UI_FORMS Broken scalability between OrCAD PCB Editor and Allegro PCB Editor
1987164 ALLEGRO_EDITOR UI_GENERAL PCB Editor stops responding when multiple sessions are accessing third-party tool
1983512 ALLEGRO_PROD_TOOLB CORE Allegro Productivity toolbox: Advanced Testpoint Check is not working
1996008 APD 3D_CANVAS New 3D Canvas does not work in APD
1993698 APD SHAPE APD stops responding and database is corrupted on moving, deleting, or updating a symbol
1999446 CAPTURE OTHER Update symbol database in Trial
1962222 CONCEPT_HDL CORE Nested hierarchy block RefDes transfer issue: suffix added to RefDes
1964260 CONCEPT_HDL CORE RefDes not updated in a hierarchy block on repackaging release 16.6 design
1972243 CONCEPT_HDL CORE Version filter does not work correctly
1993448 CONSTRAINT_MGR DATABASE CSet is duplicated with same name when modified in SigXplorer
1976148 CONSTRAINT_MGR INTERACTIV DRC worksheet in Allegro PCB Editor: 'Go to Source' flickers worksheet and does not switch
1948372 CONSTRAINT_MGR UI_FORMS cmDiffUtility fails to compare and gives the message 'Failed to read the configuration file'
1961750 EAGLE_TRANSLATOR PCB_EDITOR Voids and some shapes of third-party board not translated correctly
1984569 FSP DECAP When a pin function is in an interface or custom connector is changed, decaps defined for the part is deleted
1984588 FSP DECAP FSP crashes when changing pin functions or bank settings for a connector
1984590 FSP DECAP FSP design fails to load if pins are defined with a pin function that is later changed in custom_connector.crf
1985555 PCB_LIBRARIAN IMPORT_EXPORT j?vascript exceptions on opening libraries converted using con2cap
1961944 PCB_LIBRARIAN SYMBOL_EDITOR Hide symbol outline in new Symbol Editor
1967532 PCB_LIBRARIAN VERIFICATION libimport fails with ERROR(SPDWPAR-102): Metadata has the ErrorStatus value set.
1976965 PSPICE SIMULATOR PSpice 'Tools - Generate Report' not working in release 17.2-2016
1982260 RF_PCB FE_IFF_IMPORT Unable to successfully pull in .IFF file created in ADS.
1981585 RF_PCB LIBRARY Cannot load RF symbol via2 into PCB Editor
1976845 SIG_EXPLORER OTHER CPW trace models do not solve in SigXplorer after changing some trace parameters
1986466 SIG_INTEGRITY OTHER Delay in Relative Propagation Delay worksheet is displayed as a negative value
1980264 SIP_LAYOUT INTERACTIVE SiP Layout crashes on running 'Manufacture - Documentation - Display Pin Text'
1983381 SIP_LAYOUT REPORTS Incomplete Design Summary Report
2005709 SIP_LAYOUT SHAPE Dynamic shape voiding around same net cline segment: no property attached
2008064 SIP_LAYOUT SHAPE Hotfix 048 (QIR 7): Shape creates void for same net cline, it should be shorted
1980967 SYSTEM_CAPTURE CANVAS_EDIT System Capture does not reflect part symbol changes
1988928 SYSTEM_CAPTURE CANVAS_EDIT Changing version 2 of the resistor part makes the PART_NUMBER property visible
1990215 SYSTEM_CAPTURE CANVAS_EDIT Draw Multiple Bits: Bits do not follow mouse smoothly
1972658 SYSTEM_CAPTURE EXPORT_PCB Modified injected properties do not get updated in the pstchip.dat file after running Part Manager and Export Physical
1989421 SYSTEM_CAPTURE EXPORT_PCB Part Manager does not update the PTF values
1992407 SYSTEM_CAPTURE PART_MANAGER Part Manager removes part properties and main window and details window updates are inconsistent
About Allegro and OrCAD 17.2-2016. The OrCAD 17.2-2016 release introduced new capabilities for OrCAD Capture, PSpice Designer, and PCB Designer 17.2-2016 that address challenges with flex and rigid-flex design as well as mixed-signal simulation complexities in IoT, wearables, and wireless mobile devices. This latest release reduces PCB development time by addressing the need to design reliable circuits for smaller, more compact devices.
- OrCAD Flex and Rigid-Flex Technologies
To enable a faster and more efficient flex and rigid-flex design creation critical to IoT, wearables and wireless devices, the OrCAD 17.2-2016 portfolio enables several new capabilities for flex and rigid flex design to minimize design iterations. Key flex and rigid flex features include: Stack-up by zone for flex and rigid-flex designs, Inter-layer checks for rigid-flex designs, Contour and arc-aware routing.
- New Cross-Section Editor
In the OrCAD PCB Designer 17.2-2016 release, the Cross-Section Editor has been redesigned to leverage the underlying spreadsheet technology found in the Constraint Manager. It offers a one-stop shop for features that require the cross section for their setup, such as dynamic unused pad suppression and embedded component design. The Cross-Section Editor has been enhanced to support multiple stackups for rigid-flex design, each capable of supporting conductor and non-conductor layers such as Soldermask and Coverlay.
- New Padstack Editor
A new Padstack Editor has been introduced in OrCAD PCB Editor 17.2-2016 to ease padstack creation through a new modern user interface. In addition to supporting new pad geometries, drill types, additional attributes, and additional mask layers ability to define keep-outs within the padstack with complex geometries for all objects, the new capabilities allow PCB librarians to help PCB designers streamline the design process for complex padstacks, and also the commonly used padstacks.
- OrCAD PCB Designer 17.2-2016 Features
The OrCAD PCB Designer 17.2-2016 release also include new features or enhancements targeted towards improving PCB editors' productivity and ease-of-use. Other new features include: Via2via Line Fattening (HDI), Display Segments Over Voids, Layer Set Based Routing, Diff Pair Routing and DRC, Full Xnet Support, Gloss Commands, Contour Routing, and many more.
- OrCAD Capture Design Difference Viewer
The Graphical Design Difference Viewer is a powerful, real-time, design difference, visual review utility in OrCAD Capture with the ability to perform logical as well as graphical comparisons on a page-by-page basis. The Graphical Design Difference Viewer generates an interactive single-report HTML file that is platform and tool independent, a unique viewing feature to identify the differences leading to changes in circuit behavior as well as differences based on individual object level, thereby helping address the specialized needs of the users.
- Advanced Annotation
With the newly introduced Advanced Annotation feature supported by OrCAD Capture, users can assign reference ranges hierarchically by automatically assigning values and perform annotation on the whole design, on hierarchy block at any level, page and property block, giving them complete control over their component annotation process in the design cycle.
- PSpice Virtual Prototyping
The new virtual prototyping functionality introduced in PSpice helps electrical engineers overcome design challenges by automating the code generation for multi-level abstraction models written in C/C++ and SystemC. This functionality assists them in generating code requiring limited coding capabilities by design engineers and thereby making the process of virtual prototyping extremely convenient and easy.
Note: The ADW product line, individual ADW products, and product family names have been rebranded in release 17.2-2016. The Allegro Design Workbench (ADW) is now referred to as Allegro Engineering Data Management (EDM). For the full list of new and improved features, and fixed bugs please refer to the release notes located
About Hot-Fix. A Hot-Fix enables a customer to receive fixes for urgent problems, without having to wait for the next service pack. Unlike Service Packs (SP), which are scheduled, periodic releases, Hot-Fix releases are not periodically scheduled. Simply requesting a Hot-Fix does not automatically guarantee that the customer will receive it: all Hot-Fix requests first must be approved and accepted by Cadence prior to delivery. Furthermore, a Hot-Fix may contain fixes related to problems reported earlier by different customers. All the files included in the Hot-Fix will nevertheless be installed.
About Cadence. Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry.
Product: Cadence Allegro and OrCAD (Including EDM)
Version: 17.20.000-2016 HF049
Supported Architectures: x64
Website Home Page :
www.cadence.com

Language: english
System Requirements: PC
Supported Operating Systems: Windows 7even or newer / 2008 Server R2 / 2012 Server
System Requirements: Cadence Allegro and OrCAD (Including EDM) version 17.20.000-2016 and above
Size: 3.5 Gb

Немного информации об материале: 23-11-2018, 16:45 наш лучший журналист - apple2000 написал статью - "Cadence Allegro and OrCAD 17.20.000-2016 HF049" и сразу же добавил её к нам на сайт! Хотелось бы добавить, что наш журналист подобрал лучшее оформление и качественное содержание данной новости. Так же советуем вам посетить категорию Софт, чтобы найти другие отличные материалы, как и этот!